? semiconductor components industries, llc, 1999 february, 2000 rev. 2 1 publication order number: mac8s/d
preferred device
silicon bidirectional thyristors designed for industrial and consumer applications for full wave control of ac loads such as appliance controls, heater controls, motor controls, and other power switching applications. ? sensitive gate allows triggering by microcontrollers and other logic circuits ? uniform gate trigger currents in three quadrants; q1, q2, and q3 ? high immunity to dv/dt e 25 v/ s minimum at 110 c ? high commutating di/dt e 8.0 a/ms minimum at 110 c ? minimum and maximum values of i gt , v gt and i h specified for ease of design ? on-state current rating of 8 amperes rms at 70 c ? high surge current capability e 70 amperes ? blocking voltage to 800 volts ? rugged, economical to220ab package ? device marking: logo, device type, e.g., mac8sm, date code maximum ratings (t j = 25 c unless otherwise noted) rating symbol value unit peak repetitive offstate voltage (1) (t j = 40 to 110 c, sine wave, 50 to 60 hz, gate open) mac8sd mac8sm mac8sn v drm, v rrm 400 600 800 volts on-state rms current (full cycle sine wave, 60 hz, t c = 70 c) i t(rms) 8.0 amps peak non-repetitive surge current (one full cycle sine wave, 60 hz, t j = 110 c) i tsm 70 amps circuit fusing consideration (t = 8.3 ms) i 2 t 20 a 2 sec peak gate power (pulse width 1.0 m s, t c = 70 c) p gm 16 watts average gate power (t = 8.3 ms, t c = 70 c) p g(av) 0.35 watt operating junction temperature range t j 40 to +110 c storage temperature range t stg 40 to +150 c (1) v drm and v rrm for all types can be applied on a continuous basis. blocking voltages shall not be tested with a constant current source such that the voltage ratings of the devices are exceeded. triacs 8 amperes rms 400 thru 800 volts preferred devices are recommended choices for future use and best overall value. device package shipping ordering information to220ab 50 units/rail mac8sd to220ab to220ab case 221a style 4 1 2 3 4 pin assignment 1 2 3 gate main terminal 1 main terminal 2 4 main terminal 2 http://onsemi.com 50 units/rail mt1 g mt2 mac8sm to220ab 50 units/rail mac8sn
mac8sd, mac8sm, mac8sn http://onsemi.com 2 thermal characteristics characteristic symbol value unit thermal resistance e junction to case e junction to ambient r q jc r q ja 2.2 62.5 c/w maximum lead temperature for soldering purposes 1/8 from case for 10 seconds t l 260 c electrical characteristics (t j = 25 c unless otherwise noted; electricals apply in both directions) characteristic symbol min typ max unit off characteristics peak repetitive blocking current (v d = rated v drm , v rrm ; gate open) t j = 25 c t j = 110 c i drm , i rrm e e e e 0.01 2.0 ma on characteristics peak on-state voltage* (i tm = 11a) v tm e e 1.85 volts gate trigger current (continuous dc) (v d = 12 v, r l = 100 w ) mt2(+), g(+) mt2(+), g() mt2(), g() i gt .8 .8 .8 2.0 3.0 3.0 5.0 5.0 5.0 ma holding current (v d = 12v, gate open, initiating current = 150ma) i h 1.0 3.0 10 ma latching current (v d = 24v, i g = 5ma) mt2(+), g(+) mt2(), g() mt2(+), g() i l 2.0 2.0 2.0 5.0 10 5.0 15 20 15 ma gate trigger voltage (continuous dc) (v d = 12 v, r l = 100 w ) mt2(+), g(+) mt2(+), g() mt2(), g() v gt 0.45 0.45 0.45 0.62 0.60 0.65 1.5 1.5 1.5 volts dynamic characteristics rate of change of commutating current v d = 400 v, i tm = 3.5 a, commutating dv/dt = 10 v /sec, gate open, t j = 110 c, f = 500 hz, snubber: c s = 0.01 f , r s =15 , see figure 16.) di/dt (c) 8.0 10 e a/ms critical rate of rise of off-state voltage (v d = rate v drm , exponential waveform, r gk = 510 , t j = 110 c) dv/dt 25 75 e v/ s *indicates pulse test: pulse width 2.0 ms, duty cycle 2%.
mac8sd, mac8sm, mac8sn http://onsemi.com 3 + current + voltage v tm i h symbol parameter v drm peak repetitive forward off state voltage i drm peak forward blocking current v rrm peak repetitive reverse off state voltage i rrm peak reverse blocking current voltage current characteristic of triacs (bidirectional device) i drm at v drm on state off state i rrm at v rrm quadrant 1 mainterminal 2 + quadrant 3 mainterminal 2 v tm i h v tm maximum on state voltage i h holding current mt1 (+) i gt gate (+) mt2 ref mt1 () i gt gate (+) mt2 ref mt1 (+) i gt gate () mt2 ref mt1 () i gt gate () mt2 ref mt2 negative (negative half cycle) mt2 positive (positive half cycle) + quadrant iii quadrant iv quadrant ii quadrant i quadrant definitions for a triac i gt + i gt all polarities are referenced to mt1. with inphase signals (using standard ac lines) quadrants i and iii are used.
mac8sd, mac8sm, mac8sn http://onsemi.com 4 figure 1. rms current derating i t(rms) , rms onstate current (amps) figure 2. maximum onstate power dissipation i t(rms) , rms onstate current (amps) p (av) , average power dissipation (watts) a a a a , maximum allowable case temperature ( c) t c 12 10 8 6 4 2 0 110 100 90 80 70 60 = conduction angle 90 = 30 and 60 180 dc 12 10 8 6 4 2 0 25 20 15 10 5 0 = conduction angle = 30 60 90 dc 120 180 v t , instantaneous onstate voltage (volts) figure 3. onstate characteristics i t instantanous on-state current (amps) , i h , holding current (ma) t j , junction temperature ( c) i l , latching current (ma) 0.1 1 10 100 1000 0.01 0.1 1 t, time (ms) r (t) transient thermal resistance (normalized) z jc(t) = r jc(t) r(t) 1 10 4 , 0 5 10 15 20 25 40 25 10 5 q1 q3 20 35 50 65 80 95 110 0 2 4 6 8 10 40 25 10 5 20 35 50 65 80 95 110 t j , junction temperature ( c) mt2 negative mt2 positive maximum @ t j = 110 c maximum @ t j = 25 c typical @ t j = 25 c 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 100 10 1 0.1 figure 4. transient thermal response figure 5. typical holding current versus junction temperature figure 6. typical latching current versus junction temperature
mac8sd, mac8sm, mac8sn http://onsemi.com 5 figure 7. typical gate trigger current versus junction temperature t j , junction temperature ( c) i gt , gate trigger current (ma) figure 8. typical gate trigger voltage versus junction temperature t j , junction temperature ( c) v gt , gate trigger voltage (volts) 110 95 80 65 50 35 20 5 10 25 40 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 q2 q1 q3 q3 q1 110 95 80 65 50 35 20 5 10 25 40 0 2 4 6 8 10 12 14 q2 q3 q1 figure 9. typical exponential static dv/dt versus gatemt1 resistance, mt2(+) rgk, gatemt1 resistance (ohms) static dv/dt (v/ s) figure 10. typical exponential static dv/dt versus peak voltage, mt2(+) v pk , peak voltage (volts) static dv/dt (v/ s) figure 11. typical exponential static dv/dt versus junction temperature, mt2(+) t j , junction temperature ( c) static dv/dt (v/ s) figure 12. typical exponential static dv/dt versus peak voltage, mt2() v pk , peak voltage (volts) static dv/dt (v/ s) v pk = 400 v 600 v 800 v t j = 110 c 200 180 160 140 120 100 80 1000 900 800 700 600 500 400 300 200 100 60 r g mt1 = 510 t j = 100 c 110 c 120 c 130 120 110 100 90 80 400 450 500 550 650 700 750 600 800 100 r g mt1 = 510 v pk = 400 v 600 v 800 v 130 120 110 100 90 80 70 105 110 400 450 500 550 600 650 700 750 800 r g mt1 = 510 t j = 100 c 110 c 100 150 200 250 300 350
mac8sd, mac8sm, mac8sn http://onsemi.com 6 figure 13. typical exponential static dv/dt versus junction temperature, mt2() t j , junction temperature ( c) static dv/dt (v/ s) rgk, gatemt1 resistance (ohms) figure 14. typical exponential static dv/dt versus gatemt1 resistance, mt2() 300 250 200 150 100 100 300 500 700 900 1000 200 400 600 800 t j = 110 c v pk = 400 v 600 v 800 v r g mt1 = 510 v pk = 400 v 600 v 800 v 100 105 110 200 150 100 50 350 300 250 static dv/dt (v/ s) (di/dt) c , critical rate of change of commutating current (a/ms) (dv/dt) c , critical rate of rise of commutating voltage (v/ s) t w f = 1 2 t w (di/dt) c = 6f i tm 1000 v drm figure 15. critical rate of rise of commutating voltage 1 5 10 15 20 25 30 100 10 1 110 c 90 c 100 c v pk = 400 v figure 16. simplified test circuit to measure the critical rate of rise of commutating current (di/dt) c l l 1n4007 200 v + measure i charge control charge trigger non-polar c l 51 mt2 mt1 1n914 g trigger control 200 v rms adjust for i tm , 60 hz v ac note: component values are for verification of rated (di/dt) c . see an1048 for additional information. r s adjust for di/dt (c) c s
mac8sd, mac8sm, mac8sn http://onsemi.com 7 package dimensions style 4: pin 1. main terminal 1 2. main terminal 2 3. gate 4. main terminal 2 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension z defines a zone where all body and lead irregularities are allowed. dim min max min max millimeters inches a 0.570 0.620 14.48 15.75 b 0.380 0.405 9.66 10.28 c 0.160 0.190 4.07 4.82 d 0.025 0.035 0.64 0.88 f 0.142 0.147 3.61 3.73 g 0.095 0.105 2.42 2.66 h 0.110 0.155 2.80 3.93 j 0.018 0.025 0.46 0.64 k 0.500 0.562 12.70 14.27 l 0.045 0.060 1.15 1.52 n 0.190 0.210 4.83 5.33 q 0.100 0.120 2.54 3.04 r 0.080 0.110 2.04 2.79 s 0.045 0.055 1.15 1.39 t 0.235 0.255 5.97 6.47 u 0.000 0.050 0.00 1.27 v 0.045 1.15 z 0.080 2.04 q h z l v g n a k 123 4 d seating plane t c s t u r j to220ab case 221a09 issue z
mac8sd, mac8sm, mac8sn http://onsemi.com 8 on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent r ights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into t he body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information central/south america: spanish phone : 3033087143 (monfri 8:00am to 5:00pm mst) email : onlitspanish@hibbertco.com asia/pacific : ldc for on semiconductor asia support phone : 3036752121 (tuefri 9:00am to 1:00pm, hong kong time) toll free from hong kong & singapore: 00180044223781 email : onlitasia@hibbertco.com japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1418549 phone : 81357402745 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. mac8s/d north america literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com fax response line: 3036752167 or 8003443810 toll free usa/canada n. american technical support : 8002829855 toll free usa/canada europe: ldc for on semiconductor european support german phone : (+1) 3033087140 (mf 1:00pm to 5:00pm munich time) email : onlitgerman@hibbertco.com french phone : (+1) 3033087141 (mf 1:00pm to 5:00pm toulouse time) email : onlitfrench@hibbertco.com english phone : (+1) 3033087142 (mf 12:00pm to 5:00pm uk time) email : onlit@hibbertco.com european tollfree access*: 0080044223781 *available from germany, france, italy, england, ireland
|
